Dr. Hammond Pearce (he/him) is a Research Assistant Professor at NYU Tandon's Department of Electrical and Computer Engineering and in the NYU Center for Cybersecurity. His main research focus is in cyber-physical systems (CPS) cybersecurity, including in additive manufacturing and in industrial informatics, and also examines the implications of machine learning (ML) on design and applications in this space. He received the B.E. (Hons) degree in Computer Systems Engineering in 2014 and the Ph.D. in Computer Systems Engineering in 2020 both from the University of Auckland, Auckland, New Zealand. In 2019 he took part in the NASA International Internship Programme and worked at NASA Ames in California, and he has also worked in several industry positions, including as a full-stack web developer and as an electronics contractor working on Li-ion battery management systems. His other research interests include IoT, CPS, compilers, and AI / ML.
May 2022 - we won a distinguished paper award for our publication 'Asleep at the Keyboard? Assessing the Security of GitHub Copilot's Code Contributions' at IEEE Symposium on Security and Privacy (SP / Oakland)!
May 2022 - excited to announce that we will be presenting a Black Hat Briefing this year in Las Vegas - keep an eye out for 'In Need of 'Pair' Review: Vulnerable Code Contributions by GitHub Copilot'
March 2022 - Based on my work on GitHub Copilot cybersecurity, I am quoted in CS Online: Why you can't trust AI-generated autocomplete code to be secure
January 2022 - I gave a (virtual) talk at Intel, as part of their IPAS Tech Sharing Forum on my GitHub Copilot cybersecurity work
January 2022 - I am promoted to Research Assistant Professor in NYU Tandon.
May 2021 - I gave a (virtual) talk at ASTM International Conference on Additive Manufacturing (ASTM ICAM) on my 3D printer bootloader cybersecurity work
March 2021 - Based on my work on GitHub Copilot cybersecurity, I am quoted in Wired: It’s Like GPT-3 but for Code—Fun, Fast, and Full of Flaws
September 2020 - Based on my work on writing code with Large Language Models, I am quoted in Hackaday: I’m Sorry Dave, You Shouldn’t Write Verilog
June 2020 - I begin work as a post-doctoral research associate at NYU Tandon Department of Electrical and Computer Engineering and NYU Center for Cybersecurity with my supervisor Ramesh Karri. My work will focus on cyber-physical system cybersecurity.
February 2020 - I successfully defend my Ph.D. thesis. A special thanks to my supervisors Partha Roop and Morteza Biglari-Abhari!
"FLAW3D: A Trojan-based Cyber Attack on the Physical Outcomes of Additive Manufacturing", H. Pearce, K. Yanamandra, N. Gupta, R. Karri. IEEE Transactions on Mechatronics (TMECH). 2022.
"Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks", H. Pearce, V. R. Surabhi, P. Krishnamurthy, J. Trujillo, R. Karri, F. Khorrami. IEEE Transactions on Very Large Scale Integration Systems (TVLSI). 2022.
"Asleep at the Keyboard? Assessing the Security of GitHub Copilot's Code Contributions", H. Pearce, B. Ahmad, B. Tan, B. Dolan-Gavitt, R. Karri. IEEE Symposium on Security and Privacy (SP / Oakland). 2022.
"Formal Methods for the Security of Medical Devices", S. Pinisetty, N. Allen, H. Pearce, M. Trew, M. Singh Gaur, P. Roop. Applied Smart Health Care Informatics: A Computational Intelligence Perspective. 2022.
"Determination of Fiber Content in 3D Printed Composite Parts Using Image Analysis", H. Srivastava, H. Pearce, G. Mac, N. Gupta. IEEE Embedded Systems Letters (ESL). 2022.
"Needle in a Haystack: Detecting Subtle Malicious Edits to Additive Manufacturing G-code Files", C. Beckwith, H. S. Naicker, S. Mehta, V. R. Udapa, N.T. Tim, V. Gadre, H. Pearce, G. Mac, N. Gupta. IEEE Embedded Systems Letters (ESL). 2021.
"Uncertainty quantification in dimensions dataset of additive manufactured NIST standard test artifact", G. Mac, H. Pearce, R. Karri, N. Gupta. Data in Brief. 2021.
"DAVE: Deriving Automatically Verilog from English", H. Pearce, B. Tan, R. Karri. ACM/IEEE Workshop on Machine Learning for CAD (MLCAD) 2020.
"Designing Neural Networks for Real-Time Systems", H. Pearce, X. Yang, P. S. Roop, M. Katzef, T. B. Strøm. IEEE Embedded Systems Letters (ESL). 2020.
"A compositional approach using Keras for neural networks in real-time systems", X. Yang, P. Roop, H. Pearce, J. W. Ro. Design, Automation & Test in Europe Conference & Exhibition (DATE). 2020.
"Securing implantable medical devices with runtime enforcement hardware", H. Pearce, M. M. Y. Kuo, P. S. Roop, S. Pinisetty. ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE). 2019.
"Smart I/O modules for mitigating cyber-physical attacks on industrial control systems", H. Pearce, S. Pinisetty, P. S. Roop, M. M. Y. Kuo, A. Ukil. IEEE Transactions on Industrial Informatics (TII). 2019.
"Synthesizing IEC 61499 Function Blocks to hardware", H. Pearce, P. Roop. IEIE/IEEE International Conference on Electronics, Information, and Communication (ICEIC). 2019.
"Synchronus neural networks for cyber-physical systems", P. S. Roop, H. Pearce, K. Monadjem. ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE). 2018.
"Faster function blocks for precision timed industrial automation", H. Pearce, P. Roop, M. Biglari-Abhari, M. Schoeberl. IEEE International Symposium on Real-Time Distributed Computing (ISORC). 2018.
"Simulation of cyber-physical systems using IEC61499", H. A. Pearce, M. M. Y. Kuo, N. Allen, P. S. Roop, A. Malik. ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE). 2017.
"A model driven approach for cardiac pacemaker design using a PRET processor", N. Allen, H. Pearce, P. Roop, R. von Hanxleden. IEEE International Symposium on Real-Time Distributed Computing (ISORC). 2017.
"RunSync: A predictable runtime for precision timed automation systems", H. A. Pearce, M. M. Y. Kuo, P. S. Roop, M. Biglari-Abhari. 2016.
My thesis was titled "Model-driven Engineering for Safety and Security in Industry 4.0 ". It focused on how different engineering techniques can be utilized to test and verify different safety and security properties within different stages of the design lifecycle for industrial control and cyber-physical systems. This included work on precision-timed (PRET) architectures, modeling with IEC 61499, defining new semantics for control and plant lock-step simulation as well as for safety properties in a textual "Valued Discrete Timed Automata (VDTA)" format, and compilation tools for VDTA to Verilog.